circuits-diagrams
Safe HaskellNone
LanguageGHC2024

Strings.Svg.Layout

Description

Port-aware layout of untyped string diagrams (SDiagram).

Coordinates use chart-svg data space (y increases upward). Morphisms compose left-to-right (SThenD); tensor stacks top-to-bottom (SBeside). That matches the left/right port model and the wall-chart schematics — not the wording slip in the requirements bullet that had composition stacking vertically.

Every primitive emits its boundary ports on a uniform vertical grid with portPitch spacing, so thenL aligns whole port lists pairwise and besideL concatenates port lists slot by slot. A port-count mismatch in thenL is a wiring error: the connection is truncated to the common prefix and each unmatched port is marked with a dangling stub and dot, so the error is visible rather than silent.

Synopsis

Documentation

data Layout Source #

Laid-out diagram with boundary ports and bounding box.

Instances

Instances details
Eq Layout Source # 
Instance details

Defined in Strings.Svg.Layout

Methods

(==) :: Layout -> Layout -> Bool #

(/=) :: Layout -> Layout -> Bool #

Show Layout Source # 
Instance details

Defined in Strings.Svg.Layout

layoutSDiagram :: SDiagram -> Layout Source #

Layout an untyped skeleton at the origin (first left port near x=0).

moveLayout :: Point Double -> Layout -> Layout Source #

Translate a layout by a vector.

countGlyphs :: Layout -> Int Source #

Glyph charts (spider dots, port pads, wiring-error markers).

unitW :: Double Source #

Horizontal span of one wire / box cell.

boxH :: Double Source #

Box height (centred on the wire).

composeGap :: Double Source #

Gap between sequential (then) cells.

tensorGap :: Double Source #

Gap between tensor (beside) cells.

portPitch :: Double Source #

Vertical pitch between parallel wires.